1. Field of the Invention
This invention relates generally to digital signal processing and specifically to the pre-configuration of programmable or otherwise configurable devices, including programmable logic devices.
2. Description of Related Art
A programmable logic device (“PLD”) is a programmable integrated circuit (IC) that allows the user of the circuit, using software control, to program the PLD to perform particular logic functions. A wide variety of these devices are manufactured by Altera Corporation of San Jose, Calif. For the purpose of this description, it is to be understood that a programmable logic device refers to once programmable as well as re-programmable devices. When an integrated circuit manufacturer has supplied a typical programmable logic device, it has not been capable of performing any specific function until after it has been configured by a user. FIG. 1A shows a typical PLD 100 having dedicated resources 104 and programmable resources 102.
Therefore, a user, in conjunction with software supplied by the manufacturer or created by the user or an affiliated source, programs the PLD to perform a particular function or a plurality of functions required by the user's application. FIG. 1B shows configuration data 106, such as a bitstream, that can be sent to the PLD 100 to program and/or configure the PLD 100 to perform one or more desired functions, typically in connection with and using the dedicated resources 104. As seen in FIG. 1B, the configuration data 106 is distributed to programmable registers that act as configuration RAM (CRAM) units 108 to configure the functionality of logic elements, embedded memory modes, I/O buffer states, etc. 110 in the PLD 100. CRAM also controls the connectivity of the logic elements, all of which is well known to those skilled in the art. The output of CRAM 108 typically is a bit that is used to configure the configurable component 110 of the PLD 100. Once a logic device such as a PLD is programmed with one or more of such cores, as well as any other logic as needed, the PLD can function in a larger system designed by the user just as though dedicated logic chips were employed. However, on power up, each CRAM 108 is in an undefined state (or, for example, all bits are negated) and the PLD 100 is inoperable.
IC manufacturers such as Altera also provide users with the ability to convert programmable configurations into “hard logic” devices. For example, Altera's HardCopySM program is a seamless migration path from large PLDs to low-cost volume production devices. System architects and design engineers can leverage the functionality, flexibility and time-to-market advantages of PLDs and continue on to low-cost volume production with a HardCopy device, avoiding the financial risk and long development times associated with ASICs. A HardCopy device offers users high-density PLD designs and is designed specifically for the user by migrating the configuration file into a mask-programmed logic device. HardCopy devices typically use the same process technology as their equivalent PLD, offer the features of high-density PLD products, and come in the same packages as the PLDs. A HardCopy device architecture is based on an area-efficient “sea-of-logic-elements” core. However, once a design is converted to the HardCopy device, that device is limited to performing the mask-defined functions. In other words, users lose the ability to program the device.
Techniques that permit users to use one or more functions without requiring programming of a PLD, while still allowing configuration data to program the PLD at a later time, would represent a significant advancement in the art.